km23v4000d(e)ty/km23s4000d(e)ty cmos mask rom pin name pin function a 0 - a 18 address inputs q 0 - q 7 data outputs ce chip enable oe output enable v cc power v ss ground n.c no connection 4m-bit (512kx8) cmos mask rom the km23v4000d(e)ty and km23s4000d(e)ty are fully static mask programmable rom organized 524,288 x 8 bit. it is fabricated using silicon gate cmos process technoiogy. this device operates with low power supply, and all inputs and outputs are ttl compatible. because of its asynchronous operation, it requires no external clock assuring extremely easy operation. it is suitable for use in program memory of microprocessor, and data memory, character generator. the km23v4000d(e)ty and km23s4000d(e)ty are pack- aged in a 32-tsop1. general description features 524,288 x 8 bit organization fast access time 3.3v operation : 100ns(max.) 3.0v operation : 120ns(max.) 2.5v operation : 250ns(max.) supply voltage km23v4000d(e)ty : single +3.0v/ single +3.3v km23s4000d(e)ty : single +2.5v current consumption operating : 25ma(max.) standby : 30 m a(max.) fully static operation all inputs and outputs ttl compatible three state outputs package -. km23v(s)4000d(e)ty : 32-tsop1-0820 pin configuration product information product operating temp range vcc range (typical) speed (ns) km23v4000dty 0 c~70 c 3.3v/3.0v 100/120 km23s4000dty 2.5v 250 KM23V4000DETY -20 c~85 c 3.3v/3.0v 100/120 km23s4000dety 2.5v 250 a 18 x and decoder buffers a 0 y and decoder buffers memory cell sense amp. control logic matrix (524,288x8) buffers ce oe . . . . . . . . q 0 q 7 . . . functional block diagram a 11 a 9 a 8 a 13 a 14 a 17 n.c v cc a 18 a 16 km23v4000d(e)ty 32-tsop1 a 15 #1 #16 #17 #32 a 12 a 7 a 6 a 5 a 4 oe a 10 ce q 7 q 6 q 5 q 4 q 3 v ss q 2 q 1 q 0 a 0 a 1 a 2 a 3 km23s4000d(e)ty
km23v4000d(e)ty/km23s4000d(e)ty cmos mask rom absolute maximum ratings note : permanent device damage may occur if "absolute maximum ratings" are exceeded. functional operation should be restricted to t he conditions as detailed in the operational sections of this data sheet. exposure to absolute maximum rating conditions for extend ed periods may affect device reliability. item symbol rating unit remark voltage on any pin relative to v ss v in -0.3 to +4.5 v - temperature under bias t bias -10 to +85 c - storage temperature t stg -55 to +150 c - operating temperature t a 0 to +70 c km23v4000dty km23s4000dty -20 to +85 c KM23V4000DETY km23s4000dety recommended operating conditions (voltage reference to v ss ) item symbol min typ max unit supply voltage v cc 2.7/3.0 3.0/3.3 3.3/3.6 v 2.3 2.5 2.7 v v ss 0 0 0 v mode selection ce oe mode data power h x standby high-z standby l h operating high-z active l operating dout active dc characteristics note : minimum dc voltage(v il ) is -0.3v an input pins. during transitions, this level may undershoot to -2.0v for periods <20ns. maximum dc voltage on input pins(v ih ) is v cc +0.3v which, during transitions, may overshoot to v cc +2.0v for periods <20ns. parameter symbol test conditions min max unit operating current i cc ce = oe =v il , all outputs open v cc =3.3 0.3v - 25 ma v cc =3.0 0.3v - 20 ma v cc =2.5 0.2v - 15 ma standby current(ttl) i sb1 ce =v ih , all outputs open - 500 m a standby current(cmos) i sb2 ce =v cc , all outputs open - 30 m a input leakage current i li v in =0 to v cc - 10 m a output leakage current i lo v out =0 to v cc - 10 m a input high voltage, all inputs v ih 2.0 v cc +0.3 v input low voltage, all inputs v il km23v4000d(e)ty -0.3 0.6 v km23s4000d(e)ty -0.3 0.4 v output high voltage level v oh km23v4000d(e)ty i oh =-400 m a 2.4 - v km23s4000d(e)ty i oh =-400 m a 2.0 - v output low voltage level v ol i ol =2.1ma - 0.4 v
km23v4000d(e)ty/km23s4000d(e)ty cmos mask rom test conditions item value input pulse levels 0.45v to 2.4v (at v cc =3.3v/3.0v) 0.4v to 2.2v (at v cc =2.5v) input rise and fall times 10ns input and output timing levels 1.5v (at v cc =3.3v/3.0v) 1.5v (at v cc =2.5v) output loads 1 ttl gate and c l =100pf ac characteristics (v cc =3.3v/3.0v 0.3v / v cc =2.5v 0.2v, unless otherwise noted.) read cycle item symbol v cc =3.3v 0.3v v cc =3.0v 0.3v v cc =2.5v 0.2v unit min max min max min max read cycle time t rc 100 120 250 ns chip enable access time t ace 100 120 250 ns address access time t aa 100 120 250 ns output enable access time t oe 50 60 110 ns output or chip disable to output high-z t df 20 20 50 ns output hold from address change t oh 0 0 0 ns capacitance (t a =25 c, f=1.0mhz) note : capacitance is periodically sampled and not 100% tested. item symbol test conditions min max unit output capacitance c out v out =0v - 10 pf input capacitance c in v in =0v - 10 pf timing diagram read add ce oe d out add1 add2 valid data valid data t oh t df(note) t rc t ace t oe t aa note : t df is defined as the time at which the outputs achieve the open circuit condition and is not referenced to v oh or v ol level.
km23v4000d(e)ty/km23s4000d(e)ty cmos mask rom package dimensions unit : mm/inch 32-tsop1-0820 #32 1.00 0.10 0.039 0.004 max 8.40 0.331 0 . 1 0 m a x 0 . 0 0 4 m a x #1 0.50 ( ) 0.020 18.40 0.10 0.724 0.004 0.45 ~0.75 0.018 ~0.030 20.00 0.20 0.787 0.008 #17 + 0.10 0.15 - 0.05 + 0.004 0.006 - 0.002 0~8 + 0.10 0.20 - 0.05 + 0.004 0.008 - 0.002 0.50 0.0197 0.25 ( ) 0.010 min 0.05 0.002 max 1.20 0.047 8 . 0 0 0 . 3 1 5 typ 0.25 0.010 #16
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